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1

JAIP-MP: A Four-Core Java Application Processor for Embedded Systems
Tsai, Chun-Jen ; Wu, Tsung-Han ; Su, Hung-Cheng ; et al.
IFIP Advances in Information and Communication Technology ; 23th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC) ; https://inria.hal.science/hal-01578615 ; 23th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC), Oct 2015, Daejeon, South Korea. pp.170-192, ⟨10.1007/978-3-319-46097-0_9⟩

Daejeon South Korea Java processors Multi-core processors Embedded SoC Hardwired operating syst... …
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2

Cross-Profiling for Java Processors
Walter Binder ; Martin Schoeberl ; Philippe Moret ; et al.
http://www.jopdesign.com/doc/cprof_spe.pdf.

KEY WORDS Cross-profiling Embedded Java processors Bytecode instrumentation
*Academic Journal*
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3

A JAVA ILP Machine Based on Fast Dynamic Compilation
Kemal Ebcioglu ; Erik Altman ; Erdem Hokenek ; et al.
http://www.research.ibm.com/vliw/isca31/A%20JAVA%20ILP%20Machine%20Based%20on%20Fast%20Dynamic%20Compilation.pdf.

JAVA Processors Instruction-level parall... Object code compatible V... Dynamic compilation Binary translation Superscalar
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4

A robust stack folding approach for Java processors: an operand extraction-based algorithm
El-Kharashi, M.W. ; Elguibaly, F. ; Li, K.F.
In Journal of Systems Architecture 2001 47(8):697-726

*Academic Journal*
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5

A quantitative study for Java microprocessor architectural requirements. Part II: high-level language support
El-Kharashi, M.W. ; ElGuibaly, F. ; Li, K.F.
In Microprocessors and Microsystems 2000 24(5):237-250

*Academic Journal*
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6

A quantitative study for Java microprocessor architectural requirements. Part I: Instruction set design
El-Kharashi, M.W ; ElGuibaly, F ; Li, K.F
In Microprocessors and Microsystems 2000 24(5):225-236

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7

Reduzindo o consumo de energia em MPSoCs heterogêneos via clock gating ; Reducing energy consumption in heterogeneous MPSoCs through clock gating
Motta, Rodrigo Bittencourt ; Wagner, Flavio Rech

Microeletrônica Sistemas embarcados SoC Clock gating Heterogeneous MPSoCs Java processors …
*Dissertation/ Thesis*
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8

A hardware peripheral for Java bytecodes translation acceleration
Sideris, I ; Moshopoulos, N ; Pekmestzi, K

ASIC Java processor RISC stack folding ASIC technologies Hard task …
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9

A predecoding technique for ILP exploitation in Java processors
Sideris, I ; Pekmestzi, K ; Economakos, G

ILP Java processor Predecoded cache Stack folding Computer Science Hardware & Architecture …
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10

Building embedded dsp applications in a Java modeling framework
Sideris, I ; Pilitsos, D ; Economakos, G ; et al.

Java Language Object Model Statistical Model Audio encoding Computer architects Cycle accurate …
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11

A cache based stack folding technique for high performance Java processors
Sideris, I ; Economakos, G ; Pekmestzi, K

ilp Java processor Predecoded cache RISC Stack folding Algorithms …
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