*Result*: Resource-efficient and ultra-high throughput LDPC decoder for CCSDS near-earth standard.

*This paper presents a resource-efficient, ultra-high throughput low density parity check (LDPC) decoder that is suitable for tens of gigabit bits per second satellite communications. To address routing congestion and critical path delay, which are typically caused by the high degree of parallelism in high throughput decoder designs, this work introduces an efficient computation circuit for identifying the two minimum values in the check node update process. Furthermore, a non-uniform quantization method based on mutual information maximization is proposed for log-likelihood ratio (LLR) representation, enabling a more favorable trade-off between decoding performance and implementation complexity. Additionally, the decoder utilizes a pipelined multi-frame parallel scheduling scheme, which significantly boosts throughput with only a slight increase in storage requirements. Finally, the proposed design is implemented and tested on a Xilinx UltraScale+ XCVU13P FPGA. The results show that the decoder achieves a throughput of 76.5Gbps at 8 iterations and 200MHz. This implementation outperforms existing designs, highlighting the innovative and superior nature of our approach. • This work introduces an efficient computation circuit for identifying the two minimum values in the check node update process of LDPC decoding algorithm. • A non-uniform quantization method based on mutual information maximization is proposed for log-likelihood ratio (LLR) representation, enabling a more favorable trade-off between decoding performance and implementation complexity. • A pipelined multi-frame parallel scheduling scheme is presented to boosts decoding throughput with only a slight increase in storage requirements. [ABSTRACT FROM AUTHOR]*