*Result*: Towards a java bytecodes compiler for nios II soft-core processor

Title:
Towards a java bytecodes compiler for nios II soft-core processor
Contributors:
Universidade Estadual Paulista (UNESP)
Publication Year:
2009
Collection:
Universidade Estadual Paulista São Paulo: Repositório Institucional UNESP
Document Type:
*Conference* conference object
File Description:
104-109
Language:
English
ISSN:
1530-1346
Relation:
Proceedings - IEEE Symposium on Computers and Communications; 0,193; http://dx.doi.org/10.1109/ISCC.2009.5202253; Proceedings - IEEE Symposium on Computers and Communications, p. 104-109.; http://hdl.handle.net/11449/71241; WOS:000277119300017; 2-s2.0-70449513605; 5568681374094860; orcid:0000-0001-8248-0826
DOI:
10.1109/ISCC.2009.5202253
Rights:
openAccess
Accession Number:
edsbas.3749105C
Database:
BASE

*Further Information*

*Reconfigurable computing is one of the most recent research topics in computer science. The Altera - Nios II soft-core processor can be included in a large set of reconfigurable architectures, especially because it is designed in software, allowing it to be configured according to the application. The recent growth in applications that demand reconfigurable computing made necessary the building of compilers that translate high level languages source codes into reconfigurable devices instruction sets. In this paper we present a compiler that takes as input the bytecodes generated by a Java front-end compiler and generates a set of instructions that attends to the Nios II processor instruction set rules. Our work shows how we process Java bytecodes to the intermediate code, in the Nios II instructions format, and build the control flow and the control dependence graphs. © 2009 IEEE.*