*Result*: Performance Characterization for the Implementation of Content Addressable Memories Based on Parallel Hashing Memories

Performance Characterization for the Implementation of Content Addressable Memories Based on Parallel Hashing Memories
High performance embedded architectures and compilers; Transactions on high-performance embedded architectures and compilers II

Mahoney, P., Savaria, Y., Bois, G., Plante, P.

LECTURE NOTES IN COMPUTER SCIENCE. (5470):307-326

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